Verilog RTL Design for RF Processing

I'm looking for expertise in Verilog RTL design for processing RF or communication signals. The design will be implemented on either FPGA or ASIC, and I'm open to assistance in choosing the appropriate target hardware. Key Requirements: - Verilog RTL design experience - Familiarity with RF signal processing - FPGA/ASIC hardware knowledge - MATLAB modeling skills are a plus Ideal Skills and Experience: - Background in digital design and signal processing - Prior work on similar RF projects - Proficiency in hardware description languages If you have the right experience and can help with hardware selection, I look forward to your bids.