Publiée le 03 oct. 2026 · Nous avons confirmé le 18 oct. 2026 qu'elle est toujours active
Cette entreprise est la vôtre ?SGD 1.080 – SGD 1.800 / an
Bitdeer Technologies Group is seeking an experienced IC Design Engineer in Singapore to drive synthesis, timing closure, and power optimization for ASIC designs. You will work closely with physical design teams on floorplanning, place & route, and timing bottlenecks, while applying low-power techniques and multi-clock domain awareness. Proficiency in Verilog/SystemVerilog and industry-standard EDA tools is required, with exposure to NoC/interconnect architectures. J-18808-Ljbffr
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