Publiée le 03 oct. 2026 · Nous avons confirmé le 16 oct. 2026 qu'elle est toujours active
Cette entreprise est la vôtre ?SGD 1.080 – SGD 1.560 / an
Bitdeer Development Pte. Ltd. in Singapore is seeking an experienced PCIe IP Design Engineer to develop and implement Verilog RTL for PCIe IP blocks and support verification closure.
involves ensuring functional coverage and collaborating closely with verification and software teams to deliver robust, high-quality IP solutions.
include supporting pre-silicon and post-silicon debugging, contributing to design verification, and assisting software development. J-18808-Ljb…
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