Ultra-Compact ESP32 PCB Design

Hello, I am looking for an experienced electronics/PCB engineer to design a compact production-ready PCB. This is a redesign of a previous project, so manufacturability, component selection, reliability and proper engineering are particularly important. Main requirements The PCB must include: * ESP32 with Zigbee / Thread / Matter support * Wi-Fi support is mandatory. * Bluetooth support is mandatory. * The selected ESP32 must provide sufficient RAM and flash memory with reasonable headroom for the networking stacks and our application firmware. * ESP32-C6 may be considered, but the designer may propose a more suitable Espressif device if technically justified. * The final MCU/module selection must be agreed before PCB layout. * USB-C port * Used for firmware programming. * The ESP32 must be directly programmable through USB-C. * Compatible with our firmware development workflow using ESP-IDF / PlatformIO. * BOOT and RESET buttons * 12–24 V DC input * The board must operate reliably across the entire 12–24 V DC input range. * Appropriate reverse-polarity, overvoltage/transient and input protection must be included. * DC output * No adjustable voltage regulator is required. * The output voltage must be the same as the DC input voltage. * The 12–24 V input must therefore be available as a protected pass-through output for external devices. * Ethernet * Standard wired Ethernet connectivity is required. * PoE is NOT required. * 2 ultra-compact relays * Controlled by the ESP32. * Electrically isolated using optocouplers or an equivalent properly engineered isolation solution. * 2 Wiegand reader inputs * Suitable for standard access-control readers. * Proper protection and input conditioning must be included. * Expansion connector/socket * Reserved for future connection of a GPIO expander or additional peripherals. PCB size and layout requirements The PCB must be as compact as reasonably possible. The maximum allowed PCB size is 76 mm × 70 mm. A smaller PCB is strongly preferred, provided that reducing the size does not compromise: * electrical reliability; * isolation and clearance requirements; * thermal performance; * RF performance; * Ethernet signal integrity; * manufacturability; * serviceability. The designer should actively optimize the placement and routing to minimize the board dimensions while maintaining a robust and production-ready design. The RF section and antenna placement must be designed correctly, including the required antenna keep-out area. EasyEDA and JLCPCB are mandatory The complete project must be designed in EasyEDA. The PCB is intended to be manufactured and assembled by JLCPCB, therefore component selection must be based on parts actually available through the JLCPCB/LCSC supply chain. Component selection must balance: * good availability and stock levels; * long-term availability; * reasonable component cost; * quality and reliability; * assembly cost. Whenever possible, commonly stocked and cost-effective JLCPCB parts should be preferred over expensive or difficult-to-source components, but quality and reliability must not be sacrificed simply to reduce BOM cost. Unnecessarily exotic, obsolete or poorly stocked components should be avoided. Target production cost Cost optimization is an important requirement of this project. Our target manufacturing cost on JLCPCB is approximately US$10–15 per completed PCB, including: * PCB fabrication; * components; * SMT assembly. Shipping, import taxes/duties and one-time setup/tooling costs can be considered separately. The designer is expected to take this target into account during component selection and PCB design. Whenever technically equivalent components are available, preference should be given to solutions that provide the best balance between: * reliability; * availability; * JLCPCB assembly cost; * component price. If the designer believes that the US$10–15 target cannot realistically be achieved while meeting the technical requirements, this must be clearly communicated before proceeding with the PCB layout, together with the expected unit cost and the components responsible for the difference. Unexpected BOM cost increases after the design has been completed will not be considered acceptable if they could reasonably have been identified during component selection. Component selection For every assembled component, the BOM must include the exact LCSC/JLCPCB part number. Before finalizing the PCB, the designer must verify that the selected components are compatible with JLCPCB assembly and are reasonably available. The designer should prefer widely stocked components when technically equivalent alternatives exist. Where a critical component has a significant availability risk, a suitable alternative should preferably be identified. Deliverables The final delivery must include: * Complete EasyEDA editable project * Complete schematic * PCB layout * Gerber files * Drill files * Pick-and-place / CPL files * JLCPCB-compatible BOM * Exact LCSC part numbers * Manufacturing files ready for JLCPCB assembly * PDF schematic * PCB fabrication notes where required * Relevant datasheets / component references * Any special assembly instructions * Source files necessary for us to independently modify and manufacture future revisions of the PCB The project must not depend on proprietary files retained by the designer. Design review Before manufacturing, I expect a complete engineering review covering at least: * 12–24 V power supply design; * input protection; * protected DC pass-through output; * Ethernet PHY/interface; * ESP32 power integrity; * ESP32 RAM and flash sizing; * USB-C programming interface; * relay drivers and isolation; * Wiegand input protection; * Wi-Fi / Bluetooth / Zigbee / Thread RF layout; * antenna placement and keep-out; * grounding; * ESD protection; * PCB clearances; * thermal considerations; * DFM for JLCPCB; * estimated assembled PCB cost on JLCPCB. Prototype support The designer should be available to